DVCon, the design and verification conference, has sent out its call for papers this week.
The conference offers engineers the chance to participate in tutorials, panels and poster sessions, which concentrate on advanced design and verification tools.
This year it has expanded its focus to a couple of new areas, including system level design, low power design and verification, mixed-signal design and verification, as well as SoC verification and validation, and IP reuse and design automation.
DVCon will take place in Doubletree, San Jose from 2nd to 5th March 2015.
Call for content
DVCon has suggested topics for abstracts, tutorials, and panel discussions. The deadlines vary, but start with abstract submissions on the 28th August 2014.
Please contact us if you would like help with your submissions: +44 (0)1225 470000.